libsidplayfp 2.11.0
reSIDfp::WaveformGenerator Class Reference

#include <WaveformGenerator.h>

Public Member Functions

void setWaveformModels (matrix_t *models)
 
void setPulldownModels (matrix_t *models)
 
void setModel (bool is6581)
 
void clock ()
 
void synchronize (WaveformGenerator *syncDest, const WaveformGenerator *syncSource) const
 
void writeFREQ_LO (unsigned char freq_lo)
 
void writeFREQ_HI (unsigned char freq_hi)
 
void writePW_LO (unsigned char pw_lo)
 
void writePW_HI (unsigned char pw_hi)
 
void writeCONTROL_REG (unsigned char control)
 
void reset ()
 
unsigned int output (const WaveformGenerator *ringModulator)
 
unsigned char readOSC () const
 
unsigned int readAccumulator () const
 
unsigned int readFreq () const
 
bool readTest () const
 
bool readSync () const
 

Detailed Description

A 24 bit accumulator is the basis for waveform generation. FREQ is added to the lower 16 bits of the accumulator each cycle. The accumulator is set to zero when TEST is set, and starts counting when TEST is cleared.

Waveforms are generated as follows:

  • No waveform: When no waveform is selected, the DAC input is floating.
  • Triangle: The upper 12 bits of the accumulator are used. The MSB is used to create the falling edge of the triangle by inverting the lower 11 bits. The MSB is thrown away and the lower 11 bits are left-shifted (half the resolution, full amplitude). Ring modulation substitutes the MSB with MSB EOR NOT sync_source MSB.
  • Sawtooth: The output is identical to the upper 12 bits of the accumulator.
  • Pulse: The upper 12 bits of the accumulator are used. These bits are compared to the pulse width register by a 12 bit digital comparator; output is either all one or all zero bits. The pulse setting is delayed one cycle after the compare. The test bit, when set to one, holds the pulse waveform output at 0xfff regardless of the pulse width setting.
  • Noise: The noise output is taken from intermediate bits of a 23-bit shift register which is clocked by bit 19 of the accumulator. The shift is delayed 2 cycles after bit 19 is set high.

Operation: Calculate EOR result, shift register, set bit 0 = result.

               reset  +--------------------------------------------+
                 |    |                                            |
          test--OR-->EOR<--+                                       |
                 |         |                                       |
                 2 2 2 1 1 1 1 1 1 1 1 1 1                         |
Register bits:   2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 <---+
                     |   |       |     |   |       |     |   |
Waveform bits:       1   1       9     8   7       6     5   4
                     1   0

The low 4 waveform bits are zero (grounded).

Member Function Documentation

◆ clock()

RESID_INLINE void reSIDfp::WaveformGenerator::clock ( )

SID clocking.

◆ output()

RESID_INLINE unsigned int reSIDfp::WaveformGenerator::output ( const WaveformGenerator * ringModulator)

12-bit waveform output.

Parameters
ringModulatorThe oscillator ring-modulating current one.
Returns
the waveform generator digital output

◆ readAccumulator()

unsigned int reSIDfp::WaveformGenerator::readAccumulator ( ) const
inline

Read accumulator value.

◆ readFreq()

unsigned int reSIDfp::WaveformGenerator::readFreq ( ) const
inline

Read freq value.

◆ readOSC()

unsigned char reSIDfp::WaveformGenerator::readOSC ( ) const
inline

Read OSC3 value.

◆ readSync()

bool reSIDfp::WaveformGenerator::readSync ( ) const
inline

Read sync value.

◆ readTest()

bool reSIDfp::WaveformGenerator::readTest ( ) const
inline

Read test value.

◆ reset()

void reSIDfp::WaveformGenerator::reset ( )

SID reset.

◆ setModel()

void reSIDfp::WaveformGenerator::setModel ( bool is6581)
inline

Set the chip model. Must be called before any operation.

Parameters
is6581true if MOS6581, false if CSG8580

◆ synchronize()

void reSIDfp::WaveformGenerator::synchronize ( WaveformGenerator * syncDest,
const WaveformGenerator * syncSource ) const

Synchronize oscillators. This must be done after all the oscillators have been clock()'ed, so that they are in the same state.

Parameters
syncDestThe oscillator that will be synced
syncSourceThe sync source oscillator

◆ writeCONTROL_REG()

void reSIDfp::WaveformGenerator::writeCONTROL_REG ( unsigned char control)

Write CONTROL REGISTER register.

Parameters
controlcontrol register value

◆ writeFREQ_HI()

void reSIDfp::WaveformGenerator::writeFREQ_HI ( unsigned char freq_hi)
inline

Write FREQ HI register.

Parameters
freq_hihigh 8 bits of frequency

◆ writeFREQ_LO()

void reSIDfp::WaveformGenerator::writeFREQ_LO ( unsigned char freq_lo)
inline

Write FREQ LO register.

Parameters
freq_lolow 8 bits of frequency

◆ writePW_HI()

void reSIDfp::WaveformGenerator::writePW_HI ( unsigned char pw_hi)
inline

Write PW HI register.

Parameters
pw_hihigh 8 bits of pulse width

◆ writePW_LO()

void reSIDfp::WaveformGenerator::writePW_LO ( unsigned char pw_lo)
inline

Write PW LO register.

Parameters
pw_lolow 8 bits of pulse width

The documentation for this class was generated from the following files: